Murray-Hill, N., Fontes, L., Machado, P. ORCID: 0000-0003-1760-3871 and Ihianle, I.K. ORCID: 0000-0001-7445-8573, 2023. Secure video streaming using dedicated hardware. Journal of Signal Processing Systems. ISSN 1939-8018
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Abstract
The purpose of this article is to present a system that enhances the security, efficiency, and reconfigurability of an Internet-of-Things (IoT) system used for surveillance and monitoring. A Multi-Processor System-On-Chip (MPSoC) composed of Central Processor Unit (CPU) and Field-Programmable Gate Array (FPGA) is proposed for increasing the security and the frame rate of a smart IoT edge device. The private encryption key is safely embedded in the FPGA unit to avoid being exposed in the Random Access Memory (RAM). This allows the edge device to securely store and authenticate the key, protecting the data transmitted from the same Integrated Circuit (IC). Additionally, the edge device can simultaneously publish and route a camera stream using a lightweight communication protocol, achieving a frame rate of 14 frames per Second (fps). The performance of the MPSoC is compared to a NVIDIA Jetson Nano (NJN) and a Raspberry Pi 4 (RPI4) and it is found that the RPI4 is the most cost-effective solution but with lower frame rate, the NJN is the fastest because it can achieve higher frame-rate but it is not secure, and the MPSoC is the optimal solution because it offers a balanced frame rate and it is secure because it never exposes the secure key into the memory. The proposed system successfully addresses the challenges of security, scalability, and efficiency in an IoT system used for surveillance and monitoring. The Rivest-Shamir-Adleman (RSA) encryption key is securely stored and authenticated, and the edge device is able to simultaneously publish and route a camera stream feed high-definition images at 14 fps. The proposed system enhances the security, efficiency, and reconfigurability of an IoT system used for surveillance and monitoring. The RSA encryption key is effectively protected by the implementation of an MPSoC with Programmable Logic (PL), which also allows for faster processing and data transmission.
Item Type: | Journal article | ||||||
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Publication Title: | Journal of Signal Processing Systems | ||||||
Creators: | Murray-Hill, N., Fontes, L., Machado, P. and Ihianle, I.K. | ||||||
Publisher: | Springer | ||||||
Date: | 15 August 2023 | ||||||
ISSN: | 1939-8018 | ||||||
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Rights: | Post-prints are subject to Springer Nature re-use terms | ||||||
Divisions: | Schools > School of Science and Technology | ||||||
Record created by: | Laura Ward | ||||||
Date Added: | 28 Mar 2023 15:01 | ||||||
Last Modified: | 15 Aug 2024 03:00 | ||||||
URI: | https://irep.ntu.ac.uk/id/eprint/48647 |
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