A single-chip FPGA implementation of real-time adaptive background model

Appiah, K ORCID logoORCID: https://orcid.org/0000-0002-9480-0679 and Hunter, A, 2005. A single-chip FPGA implementation of real-time adaptive background model. In: 2005 IEEE International Conference on Field Programmable Technology, National University of Singapore, Singapore, 11-14 December 2005. IEEE (Institute of Electrical and Electronics Engineers), pp. 95-102. ISBN 0780394070

Full text not available from this repository.
Item Type: Chapter in book
Creators: Appiah, K. and Hunter, A.
Publisher: IEEE (Institute of Electrical and Electronics Engineers)
Date: 2005
ISBN: 0780394070
Identifiers:
Number
Type
10.1109/FPT.2005.1568531
DOI
Divisions: Schools > School of Science and Technology
Record created by: EPrints Services
Date Added: 09 Oct 2015 10:38
Last Modified: 09 Jun 2017 13:35
URI: https://irep.ntu.ac.uk/id/eprint/15851

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